; Assura generated file -- DO NOT EDIT --
; Do NOT rely on the content of this file, it may change.
;
2 statistics extraction device net pin parameter rewire total
stat extr dev net pin param rewire total 
none matched expanded errors param_err pin_err empty_sch empty_lay not_run 
00000005
24 Q1.1 layout HW3_evansoan 1 0 0 0 1 135 1 164 1 185 1 210 1 235 1 264 1 286 1 315 1 339 1 363 1 384 1 409 1 434 1 455 1 479 1 503 1 523 1 543 1 563 1 583 1 603 1 623 1 643 1 663 1 683 1 704 1 725 1 749 1 774 1 798 1 825 1 850 1 878 1 902 1 927 1 951 1 978 1 1003 1 1031 1 1054 1 1079 1 1098 1 1121 1 1144 1 1167 1 1189 1 1215 1 1234 1 1257 1 1280 1 1302 1 1322 1 1342 1 1363 1 1382 1 1401 1 1421 1 1442
22 INVX1 layout gsclib045 2 25 INVX1 schematic gsclib045 1 0
23 AND2X1 layout gsclib045 3 26 AND2X1 schematic gsclib045 1 0
22 OR2X1 layout gsclib045 4 25 OR2X1 schematic gsclib045 1 0
25 DFFRHQX1 layout gsclib045 5 28 DFFRHQX1 schematic gsclib045 1 0
24 Q1.1 layout HW3_evansoan 1 27 Q1.1 schematic HW3_evansoan 1 0
